The Computer Engineering Research Center

UT Mixed-Signal/RF Integrated Circuits Seminar Series

The goal of the UT Mixed-Signal/RF Integrated Circuits Seminar Series is to provide an open forum for faculty, graduate students and local industry experts to share new ideas and directions in the general areas of mixed-signal/RF integrated circuits.  This Seminar Series is organized by Profs. Ranjit Gharpurey and Shouli Yan, and sponsored by the Department of Electrical and Computer Engineering and the Computer Engineering Research Center, at the University of Texas at Austin.

Cookies and drinks will be served.  Parking validation will be provided for local industry attendees.

Mailing list: Please click here for instructions on how to subscribe or unsubscribe.

Schedule for Fall 2005

Date/Time	Location	Speaker	Title/Abstract	Slides/Papers
Sep. 21, 5:15-6:45pm	ACES 6.304	Dr. Jinwen Xiao	A 4µA-quiescent-current dual-mode buck converter IC for cellular phone applications	slides
Sep. 30, 1:45-3:00pm	ACES 2.402	Prof. Ramesh Harjani	Analog/RF circuits for high-speed communications	slides
Oct. 5, 1:45-3:00pm	ACES 6.304	Dr. Khurram Muhammad	Digital RF processing for wireless communication	slides
Oct. 19, 1:45-3:00pm	ACES 2.402	Dr. Srinivasan Venkatraman	Design trends in deep-submicron CMOS with example of GPS-receiver	slides
Nov. 11, 2:15-3:30pm	ACES 2.402	Dr. Yorgos Palaskas	Analog/RF CMOS Circuit Design	slides
Dec. 09, 1:30-3:00pm	ACES 2.402	Prof. Jaijeet Roychowdhury	Automated Extraction of Non-linear Oscillator Macromodels and their use for Fast Simulation of VCOs, PLLs and Nano/Bio Systems	slides

Previous Talks

Click here for previous talks from Spring 2005.

Maps

• The ACES building is the new structure on the southeast corner of 24th and Speedway.
• Parking: We suggest parking garage 1 (PG1) at San Jacinto and 24th
• Need directions? Here are maps showing:
• Scalable Yahoo map of 24th and Speedway
• The UT Campus Area
• Submap including ACES Building
• Submap including Parking Garage #1

Organization

Comments? Need to schedule a seminar? Please contact Profs. Ranjit Gharpurey or Shouli Yan.

Please visit our sister UT VLSI seminar series organized by Profs. Michael Orshansky and David Z. Pan.

Acknowledgement

We appreciate the web template provided by Profs. Michael Orshansky and David Z. Pan, and acknowledge the kind help from Prof. David Z. Pan to send out the announcements of the first two seminars of this series.

Last modified on 10/03/2005 by Shouli Yan.