THE COMPUTER ENGINEERING RESEARCH CENTER

THE UNIVERSITY OF TEXAS AT AUSTIN

UT VLSI Seminar Series

Sponsored by: 

The VLSI Seminar Series is organized by the Integrated Circuits and Systems group at the University of Texas at Austin.  The goal is to provide an open forum for faculty, graduate students and local industry experts to share new ideas and directions in the general area of large-scale integrated circuits. It is held on a fortnightly basis

Cookie and coffee will be served.  Parking validation will be provided for local industry attendees.

Mailing list: Please click here for instructions on how to subscribe or unsubscribe

Schedule for Spring 2006

Date/Time	Location	Speaker	Title/Abstract	Slides/Papers
Feb 1,  5pm	ACES 2.402	Dr. Tom Williams	Design For Testability: The Path to Deep Submicron	NA
Feb 10,  2:30 pm	ACES 6.304	Prof. Subhasish Mitra	Built-In Soft Error Resilience for Robust System Design	NA
Mar 3,   4 pm	ACES 2.302 Avaya Auditorium	Dr. Sani R. Nassif	Impact of variability on power	pdf
April 21,   3 pm	ACES 6.304	Prof. Kaushik Roy	Design in the Nanometer Regime: From Devices to System Architecture	NA
April 26,   5 pm	ACES 6.402	Prof. Yehia Massoud	Towards High Performance and Nanoscale System-on-Chip Design	NA
May 3,   2 pm	ACES 2.302 Avaya Auditorium	Dr. Dileep Bhandarkar	Multi-Core Microprocessor Chips: Motivation and Challenges	pdf
May 9,   10 am	ACES 2.402	Prof. Lawrence T. Pileggi	Circuits and Design Methodologies for Scaled CMOS Technologies	NA
May 9,   5 pm	ACES 2.402	Prof. Igor Markov	Improving Place-and-Route Results by Optimizing Steiner-tree Length in Placement	pdf

Maps

• The ACES building is the new structure on the southeast corner of 24th and Speedway.
• Parking: We suggest parking garage 1 (PG1) at San Jacinto and 24th
• Need directions? Here are maps showing:
  • Scalable Yahoo map of 24th and Speedway
  • The UT Campus Area
  • Submap including ACES Building
  • Submap including Parking Garage #1

Organization

Comments? Need to schedule a seminar? Please contact Michael Orshansky or David Z. Pan.

This seminar series is jointly organized by the Department of Electrical and Computer Engineering, and the Computer Engineering Research Center at the University of Texas at Austin.

Previous Talks

Fall 2005

Spring 2005

Fall 2004

Spring 2004

Fall 2003

---

Sister Seminars

• Mixed-Signal/RF Integrated Circuits Seminar
• Computer Architecture Seminar

Last modified 10/05/2006 by Anand Ramalingam