About
I am Ashutosh Chakraborty: image on the right side of this section is mine (click to make it bigger). I am pursuing my PhD (since August 2006) in the Department of Electrical and Computer Engineering at the University of Texas (UT) at Austin where I am affiliated with the UT VLSI Design Automation Laboratory. My research advisor at UT is Professor David Z Pan. The primary field of my research is Timing and Reliability Optimization for nano-CMOS circuits with particular emphasis on mechanical stress aware device optimization and NBTI aware design methodology. More details about my research activity can be found in the Research page.
In the past, I have worked as Assistant Researcher ('04 - '06) in the Department of Computer Science at Politecnico di Torino, Italy where I was affiliated with the EDA Group. My advisor there was Prof. Enrico Macii. Prior to that ('02 - '04), I worked as Senior Member Technical Staff with Mentor Graphics Corporation on their hardware verification and netlist optimization products. I received my Bachelor of Tecnology (B-Tech) from the Department of Electrical Engineering (with best thesis award) at the Indian Institute of Technology (IIT), Delhi in 2002.
CV/Resume
Download the latest copy of my CV in PDF format (good for printing or downloading). If you prefer, a HTML format of my CV (using latex2html tool) can be seen too.
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