Zhiheng Cao
Zhiheng Cao is a Ph.D. student advised by Prof. Shouli Yan. He graduated in March 2004 from the EEIC Engineering Department, University of Tokyo with Bachelor's degree.
Zhiheng Cao, Shouli Yan and Yunchu Li, “A 32mW 1.25GS/s 6b 2b/Step SAR ADC in 0.13µm CMOS,” Paper 30.2, International Solid State Circuit Conference (ISSCC), February, 2008 Slides
Zhiheng Cao, Yunchu Li and Shouli Yan, “A 0.4ps-RMS-Jitter 1-3GHz Ring-Oscillator PLL Using Phase-Noise Preamplification,” Paper 12.2, Symposium on VLSI Circuits, June 2008 Slides
Zhiheng Cao and Shouli Yan, “A 52mW 10b 210MS/s Two-Step ADC for Digital-IF Receivers in 0.13µm CMOS,” Paper 12.5 IEEE Custom Integrated Circuits Conference (CICC), September 2008 Paper Slides
Zhiheng Cao, Tongyu Song and Shouli Yan, “A 14mW 2.5MS/s 14bit Sigma-Delta Modulator Using Pseudo-Differential Split-Path Amplifiers,” IEEE Journal of Solid State Circuits, Oct., 2007, pp. 2169-2179.
Zhiheng Cao, Tongyu Song and Shouli Yan, “A 14mW 2.5MS/s 14bit Sigma-Delta Modulator Using Pseudo-Differential Split-Path Cascode Amplifiers,” IEEE Custom Integrated Circuits Conference, September 2006.
Zhiheng Cao and Shouli Yan, “A Study of Voltage Reference Buffers for Low-Power Low-Voltage Switched-Capacitor Circuits,” IEEE International Midwest Symposium on Circuits and Systems, August 2006. PDF
Zhiheng Cao and Shouli Yan, “A Multi-bit Switched Capacitor DAC with Robust Analog Background Calibration,” IEEE International Midwest Symposium on Circuits and Systems, August 2006. PDF
Zhiheng Cao and Shouli Yan, “A Robust Analog Background Calibration Technique for Multi-bit Switched Capacitor DACs,” to appear in Electronics Letters. PDF
Zhiheng Cao and Shouli Yan, “A Digital Background Calibration Method for MASH Delta-sigma Modulators by Using Coefficient Estimation,” IEEE International Symposium on Circuits and Systems, May 2005. PDF
Course Projects
EE382V project, "An UWB Receiver Analog Front-End," Spring 2006; Report (PDF)