Jayanta Bhadra's Homepage Jay Bhadra's Homepage

Welcome

Following are archaeological remnants of my former webpage:

Formal Verification of Hardware: reviews and surveys
Photography: please email me if you want access. A small glimpse here.
Publications

The following announcements are from conferences/workshops that I am currently involved with as technical program committee member:

International Workshop on Microprocessor Test and Verification (MTV), December 2009: Call for papers (PDF)
Deadline: September 1, 2009
VLSI Test Symposium (VTS), April 2010: Preliminary Call for papers
Deadline: September 20, 2009
Workshop on Constraints in Formal Verification (CFV), August 2008: Call for papers
Deadline: April 22, 2009 (closed)
International Symposium on Quality Electronic Design (ISQED), March 2008: Call for papers
Deadline: October 10, 2008 (closed)

Many thanks to my advisor, Prof. Jacob Abraham (web) and my lab, CERC for hosting this page since 1997. Thanks also to CERC sysadmin Andrew Kieschnick for helping me with various web access issues.

Jay Bhadra's Homepage