Publication

Journal:

  1. Linxiao Shen, Nanshu Lu, and Nan Sun, “A 1-V 0.25-μW Inverter Stacking Amplifier with 1.07 Noise Efficiency Factor,” IEEE Journal of Solid-State Circuits, accepted.
  2. Yeonam Yoon and Nan Sun, “A 6-bit 0.81mW 700-MS/s SAR ADC with Sparkle Code Correction, Resolution Enhancement, and Background Window Width Calibration,” IEEE Journal of Solid-State Circuits (CICC invited submission), accepted.
  3. Jiaxin Liu, Guangjun Wen, and Nan Sun, “Second-order DAC mismatch error shaping for SAR ADCs,” Electronic Letters, 2017.
  4. Jeonggoo Song, Kareem Ragab, Xiyuan Tang, and Nan Sun, “A 10-b 800MS/s Time-Interleaved SAR ADC with Fast Variance-Based Timing-Skew Calibration,” IEEE Journal of Solid-State Circuits (ASSCC invited submission), vol. 52, no. 10, pp. 2563-2575, Oct. 2017.
  5. Wenjuan Guo, Youngchun Kim, Ahmed Tewfik, and Nan Sun, “A Fully-Passive Compressive Sensing SAR ADC for Low-Power Wireless Sensors,” IEEE Journal of Solid-State Circuits, vol. 52, no. 8, pp. 2154-2167, July 2017.  
  6. Arindam Sanyal and Nan Sun, “An Energy-Efficient Hybrid SAR-VCO ΔΣ Capacitance-to-Digital Converter in 40nm CMOS,” IEEE Journal of Solid-State Circuits (ESSCIRC invited submission), vol. 52, no. 7, pp. 1966-1976, July 2017.
  7. Shaolan Li, Abhishek Mukherjee, and Nan Sun, “A 174.3dB FoM VCO-Based CT ΔΣ Modulator with a Fully Digital Phase Extended Quantizer and Tri-Level Resistor DAC in 130nm CMOS,” IEEE Journal of Solid-State Circuits (ESSCIRC invited submission), vol. 52, no. 7, pp. 1940-1952, July 2017.
  8. Long Chen, Xiyuan Tang, Arindam Sanyal, Yeonam Yoon, Jie Cong, and Nan Sun, “A 0.7V 0.6μW 100kS/s Low-Power SAR ADC with Statistical Estimation Based Noise Reduction,” IEEE Journal of Solid-State Circuits, vol. 52, no. 5, pp. 1388 – 1398, May 2017.
  9. Kareem Ragab and Nan Sun, “A 12b ENOB, 2.5MHz, 4.8mW VCO-based 0-1 MASH with direct digital background calibration,”IEEE Journal of Solid-State Circuits, vol. 52, no. 2, pp. 433 – 447, Feb. 2017.
  10. Arindam Sanyal and Nan Sun, “A second-order VCO-based delta sigma ADC using a modified DPLL,” Electronics Letters, vol. 52, no. 14, pp. 1204-1205, Jun. 2016.
  11. Long Chen, Kareem Ragab, Xiyuan Tang, Jeonggoo Song, Arindam Sanyal, and Nan Sun, “A 0.95-mW 6-b 700-Ms/s single-channel loop-unrolled SAR ADC in 40-nm CMOS,”  IEEE Transactions on Circuits and Systems – II: Express Briefs, vol. 64, no. 3, pp. 244-248, Mar. 2017.
  12. Arindam Sanyal, Xueyi Yu, Yanlong Zhang, and Nan Sun, “Fractional-N PLL with multi-element fractional divider for noise reduction,” Electronics Letters, vol. 52, no. 10, pp. 809-810, May 2016.
  13. Kyoungtae Lee, Yeonam Yoon, and Nan Sun, “A scaling-friendly low-power small-area delta-sigma ADC with VCO-based integrator and intrinsic mismatch shaping capability,” IEEE Journal of Emerging and Selected Topics in Circuits and Systems, vol. 5, no. 4, pp. 561-573, Dec. 2015.
  14. Arindam Sanyal and Nan Sun, “Dynamic element matching techniques for static and dynamic errors in continuous-time multi-bit delta-sigma modulators,” IEEE Journal of Emerging and Selected Topics in Circuits and Systems, vol. 5, no. 4, pp. 598-611, Dec. 2015.
  15. Arindam Sanyal, Long Chen, and Nan Sun, “Dynamic element matching with signal-independent element transition rates for multibit delta sigma modulators,” IEEE Transactions on Circuits and Systems – I: Regular Papers, vol. 62, no. 5, pp. 1325-1334, May, 2015.
  16. Dongwan Ha, Nan Sun, and Donhee Ham, “Next generation multi-dimensional NMR spectrometer based on semiconductor technology,” eMagRes, vol. 4, pp. 117-125, 2015.
  17. Wenjuan Guo, Tsedeniya Abraham, Steven Chiang, Chintan Trehan, Masahiro Yoshioka, and Nan Sun, “An area and power-efficient Iref compensation technique for voltage-mode R-2R DACs,” IEEE Transactions on Circuits and Systems – II: Express Briefs, vol. 62, no. 7, pp. 656-660, July 2015.
  18. Manzur Rahman, Arindam Sanyal, and Nan Sun, “A novel hybrid radix-3/radix-2 SAR ADC with fast convergence and low hardware complexity,” IEEE Transactions on Circuits and Systems – II: Express Briefs, vol. 62, no. 5, pp. 426-430, May 2015.
  19. Kareem Ragab, Long Chen, Arindam Sanyal, and Nan Sun, “Digital background calibration for pipelined ADCs based on comparator decision time quantization,” IEEE Transactions on Circuits and Systems – II: Express Briefs, vol. 62, no. 5, pp. 456-460, May 2015.
  20. Dongwan Ha, Jeffrey Paulsen, Nan Sun, Yi-Qiao Song, and Donhee Ham, “Scalable NMR spectroscopy with semiconductor chips,” Proceedings of National Academy of Engineering (PNAS), vol. 111, no. 33, pp. 11955–11960, Aug. 2014.
  21. Arindam Sanyal, Peijun Wang, and Nan Sun, “A thermometer-like mismatch shaping technique with minimum element transition activity for multi-bit delta-sigma DACs,” IEEE Transactions on Circuits and Systems – II: Express Briefs, vol. 61, no. 7, pp. 461-465, Jul. 2014.
  22. Arindam Sanyal and Nan Sun, “An energy-efficient, low frequency-dependence switching technique for SAR ADCs,IEEE Transactions on Circuits and Systems – II: Express Briefs, vol. 61, no. 5, pp. 294-298, May 2014.
  23. Arindam Sanyal and Nan Sun, “SAR ADC architecture with 98% reduction in switching energy over conventional scheme,” Electronics Letters, vol. 49, pp. 248-250, 2013.
  24. Kareem Ragab, Mucahit Kozak, and Nan Sun, “Thermal noise analysis of a programmable-gain switched-capacitor amplifier with input offset cancellation,” IEEE Transactions on Circuits and Systems – II: Express Briefs, vol. 60, pp. 147-151, Mar. 2013.
  25. Nan Sun, Yong Liu, Ling Qin, Hakho Lee, Ralph Weissleder, and Donhee Ham, “Small NMR biomolecular sensor,” Journal of Solid-State Electronics (invited paper), 2013.
  26. Youngchun Kim, Wenjuan Guo, Vikrham Gowreesunker, Nan Sun, and Ahmed Tewfik, “Multi-channel sparse data conversion with a single analog-to-digital converter,” IEEE Journal of Emerging and Selected Topics in Circuits and Systems, vol. 2, pp. 470-481, Sep. 2012.
  27. Nan Sun, “Exploiting process variation and noise to calibration gain nonlinearities in pipelined ADCs,” IEEE Transactions on Circuits and Systems – I: Regular Papers, vol. 59, no. 4, pp. 685-695, Apr. 2012.
  28. Nan Sun, “High-order mismatch-shaped segmented multibit delta-sigma DACs with arbitrary unit weights,” IEEE Transactions on Circuits and Systems – I: Regular Papers, vol. 59, no. 2, pp. 295-304, Feb. 2012.
  29. Nan Sun and Peiyan Cao, “Low-complexity high-order vector-based mismatch shaping in multi-bit ΔΣ ADCs,” IEEE Transactions on Circuits and Systems – II: Express Briefs, vol. 58, no. 12, pp 872-876, Dec. 2011.
  30. Nan Sun, “High-order mismatch-shaping in multibit DACs,” IEEE Transactions on Circuits and Systems – II: Express Briefs, vol. 58, no. 6, pp 346-350, Jun. 2011.
  31. Nan Sun, Tae-Jong Yoon, Hakho Lee, William Andress, Ralph Weissleder, and Donhee Ham, “Palm NMR and one-chip NMR,” IEEE Journal of Solid-State Circuits, vol. 46, no. 1, pp. 342-352, Jan. 2011.
  32. Nan Sun, Yong Liu, Hakho Lee, Ralph Weissleder, and Donhee Ham, “CMOS RF biosensor utilizing nuclear magnetic resonance,” IEEE Journal of Solid-State Circuits, vol. 44, no. 5, pp. 1629-1643, May 2009.
  33. Nan Sun, Hae-Seung Lee, and Donhee Ham, “Digital background calibration in pipelined ADCs using commutated feedback capacitor switching,” IEEE Transactions on Circuits and Systems – II: Express Briefs, vol. 55, no. 9, pp. 877-881, Sep. 2008.
  34. Nan Sun, William Andress, Kyoungho Woo, and Donhee Ham, “Surpassing tradeoffs by separation: examples in transmission line resonators, phase-locked loops, and analog-to-digital converters,” (invited paper) Journal of Semiconductor Technology and Science, vol. 8, pp. 210-220, 2008.
  35. David Ricketts, Xiaofeng Li, Nan Sun, Kyoungho Woo and Donhee Ham, “On the self-generation of electrical soliton pulses,” IEEE Journal of Solid-State Circuits, vol. 42, no. 8, pp. 1657-1668, August 2007.

Conference:

  1. Shaolan Li, Bo Qiao, Miguel Gandara, and Nan Sun, “A 13-bit ENOB 2nd-order Noise-Shaping SAR ADC Realizing Optimized NTF Zeros Using the Error-Feedback Structure,” IEEE International Solid-State Circuits Conference (ISSCC), 2018, to appear.
  2. Miguel Gandara, Paridhi Gulati, and Nan Sun, “A 172dB-FoM Pipelined SAR ADC Using a Regenerative Amplifier with Self-Timed Gain Control and Mixed-Signal Background Calibration,” IEEE Asian Solid-State Circuits Conference (ASSCC), 2017, to appear.
  3. Xiyuan Tang, Long Chen, Jeonggoo Song, and Nan Sun, “A 1.5fJ/Conv-step 10b 100kS/s SAR ADC with Power-Efficient Noise Reduction,” IEEE Asian Solid-State Circuits Conference (ASSCC), 2017, to appear.
  4. Dongwan Ha, Nan Sun, Jeffrey Paulsen, Yiqiao Song, and Donhee Ham, “Integrated CMOS Spectrometer for Multi-Dimensional NMR Spectroscopy,” IEEE Midwest Symposium on Circuits and Systems, accepted (invited).
  5. Hyoyoung Jeong, Taewoo Ha, Irene Kuang, Linxiao Shen, Zhaohe Dai, Nan Sun, Nanshu Lu, “NFC-Enabled, Tattoo-Like Stretchable Biosensor Manufactured by “Cut-and-Paste” Method,” 39th Annual International Conference of the IEEE Engineering in Medicine and Biology Society, accepted.
  6. Linxiao Shen, Nanshu Lu, and Nan Sun, “A 1V 0.25uW Inverter-Stacking Amplifier with 1.07 Noise Efficiency Factor,” IEEE Symposium on VLSI Circuits (VLSI), pp. C140-C141, 2017.
  7. Shaolan Li and Nan Sun, “A 0.028mm2 19.8fJ/step 2nd-Order VCO-based CT Delta Sigma Modulator Using an Inherent Passive Integrator and Capacitive Feedback in 40nm CMOS,” IEEE Symposium on VLSI Circuits (VLSI), pp. C36-C37, 2017.
  8. Wenjuan Guo, Haoyu Zhuang, and Nan Sun, “A 13b-ENOB 173dB-FoM 2nd -Order NS SAR ADC with Passive Integrators,” IEEE Symposium on VLSI Circuits (VLSI), pp. C236-C237, 2017.
  9. Xiaodan Xi, Haoyu Zhuang, Nan Sun, and Michael Orshansky, “Strong Subthreshold Current Array PUF with 2^65 Challenge-Response Pairs Resilient to Machine Learning Attacks in 130nm CMOS,” IEEE Symposium on VLSI Circuits (VLSI), pp. C268-C269, 2017.
  10. Biying Xu, Shaolan Li, Nan Sun, and David Z. Pan, “A Scaling Compatible, Synthesis Friendly VCO-based Delta-sigma ADC Design and Synthesis Methodology,” IEEE Design Automation Conference (DAC), 2017.
  11. Biying Xu, Shaolan Li, Xiaoqing Xu, Nan Sun, and David Z. Pan, “Hierarchical and Analytical Placement Techniques for High-Performance Analog Circuits,” IEEE International Symposium on Physical Design (ISPD), 2017.
  12. Yeonam Yoon and Nan Sun, “A 6-bit 0.81mW 700-MS/s SAR ADC with Sparkle-Code Correction, Resolution Enhancement, and Background Window Width Calibration,” IEEE Custom Integrated Circuits Conference (CICC), 2017.
  13. Miguel Gandara, Wenjuan Guo, Xiyuan Tang, Long Chen, Yeonam Yoon, and Nan Sun, “A Pipelined SAR ADC Reusing the Comparator as Residue Amplifier,” IEEE Custom Integrated Circuits Conference (CICC), 2017.
  14. Jeonggoo Song, Xiyuan Tang, and Nan Sun, “A 10-b 2b/cycle 300MS/s SAR ADC with a Single Differential DAC in 40nm CMOS,” IEEE Custom Integrated Circuits Conference (CICC), 2017.
  15. Jeonggoo Song, Kareem Ragab, Xiyuan Tang, and Nan Sun, “A 10-b 800MS/s time-interleaved SAR ADC with fast timing-skew calibration,” IEEE Asian Solid-State Circuits Conference (ASSCC), pp. 73-76, 2016.
  16. Wenjuan Guo and Nan Sun, “A 12b-ENOB 61μW Noise-Shaping SAR ADC with a Passive Integrator,” IEEE European Solid-State Circuits Conference (ESSCIRC), pp. 405-408, Sept. 2016.
  17. Wenjuan Guo and Nan Sun, “A 9.8b-ENOB 5.5fJ/Step Fully-Passive Compressive Sensing SAR ADC for WSN Applications,” IEEE European Solid-State Circuits Conference (ESSCIRC), pp. 91-94, Sept. 2016.
  18. Shaolan Li and Nan Sun, “A 174.3dB FoM VCO-Based CT ΔΣ Modulator with a Fully Digital Phase Extended Quantizer and Tri-Level Resistor DAC in 130nm CMOS,” IEEE European Solid-State Circuits Conference (ESSCIRC), pp. 241-244, Sept. 2016.
  19. Kareem Ragab and Nan Sun, “A 1.4mW 8b 350MS/s Loop-Unrolled SAR ADC with Background Offset Calibration in 40nm CMOS,” IEEE European Solid-State Circuits Conference (ESSCIRC), pp. 417-420, Sept. 2016.
  20. Arindam Sanyal and Nan Sun, “A 55fJ/conv-step Hybrid SAR-VCO Delta Sigma Capacitance-to-Digital Converter in 40nm CMOS,” IEEE European Solid-State Circuits Conference (ESSCIRC), pp. 385-388, Sept. 2016.
  21. Xiyuan Tang, Long Chen, Jeonggoo Song, and Nan Sun, “A 10-b 750μW 200MS/s Fully Dynamic Single-Channel SAR ADC in 40nm CMOS,” IEEE European Solid-State Circuits Conference (ESSCIRC), pp. 413-416, Sept. 2016.
  22. Arindam Sanyal and Nan Sun, “A 18.5‐fJ/step VCO‐based 0‐1 MASH delta-sigma ADC with digital background calibration,” IEEE Symposium on VLSI Circuits (VLSI), pp. 26-27, Jun. 2016.
  23. Long Chen, Arindam Sanyal, Ji Ma, and Nan Sun, “Comparator common-mode variation effects analysis and its application in SAR ADCs,” IEEE International Symposium on Circuits and Systems (ISCAS), 2016.
  24. Wenjuan Guo, Youngchun Kim, Ahmed Tewfik, and Nan Sun, “Ultra-Low Power Multi-channel Data Conversion with a Single SAR ADC for Mobile Sensing Applications“, Custom Integrated Circuit Conference (CICC), pp. 1-4, Sept. 2015.
  25. Yeonam Yoon, Koungtae Lee, Sungjin Hong, Xiyuan Tang, Long Chen, and Nan Sun, “A 0.04-mm2 Modular ∆Σ ADC with VCO-based Integrator and 0.9-mW 71-dB SNDR Distributed Digital DAC Calibration“, Custom Integrated Circuit Conference (CICC), pp. 1-4, Sept. 2015.
  26. Long Chen, Xiyuan Tang, Arindam Sanyal, Yeonam Yoon, Jie Cong, and Nan Sun, “A 10.5-b ENOB 645nW 100kS/s SAR ADC with Statistical Estimation Based Noise Reduction“, Custom Integrated Circuit Conference (CICC), pp. 1-4, Sept. 2015.
  27. Kareem Ragab and Nan Sun, “A 12b ENOB, 2.5MHz-BW, 4.8mW VCO-Based 0-1 MASH ADC with Direct Digital Background Nonlinearity Calibration“, Custom Integrated Circuit Conference (CICC), pp. 1-4, Sept. 2015.
  28. Nicholas Wood and Nan Sun, “Predicting ADC – a new approach to ADC design,” IEEE Dallas Circuits and Systems Conference (DCAS), pp. 1-4, Oct. 2014.
  29. Arindam Sanyal, Kareem Ragab, Long Chen, T.R. Viswanathan, Shouli Yan, and Nan Sun, “A hybrid SAR-VCO delta-sigma ADC with first-order noise shaping,” Custom Integrated Circuit Conference (CICC), pp. 1-4, 2014.
  30. Long Chen, Arindam Sanyal, Ji Ma, and Nan Sun, “A 24-uW 11-bit 1-MS/s SAR ADC with a bidirectional single-side switching technique,” European Solid-State Circuit Conference (ESSCIRC), pp. 219-222, 2014.
  31. K. R. Raghunandan, Nan Sun, and T.R. Viswanathan, “Analog signal processing in deep submicron CMOS technologies using inverters,” IEEE International Midwest Symposium on Circuits and Systems (MWSCAS), pp. 394-397, 2014.
  32. Arindam Sanyal and Nan Sun, “A low frequency-dependence, energy-efficient switching technique for bottom-plate sampled SAR ADC,” IEEE International Symposium on Circuits and Systems (ISCAS), pp. 297-300, 2014.
  33. Xiankun Jin and Nan Sun, “Low-cost high-quality constant offset injection for SEIR-based ADC built-in-self-test,” IEEE International Symposium on Circuits and Systems (ISCAS), pp. 285-288, 2014.
  34. Peijun Wang and Nan Sun, “A random DEM technique with minimal element transition rate for high-speed DACs,” IEEE International Symposium on Circuits and Systems (ISCAS), pp. 1155-1158, 2014.
  35. Long Chen, Ji Ma, and Nan Sun, “Capacitor mismatch calibration for SAR ADCs based on comparator metastability detection,” IEEE International Symposium on Circuits and Systems (ISCAS), pp. 2357-2360, 2014.
  36. Arindam Sanyal and Nan Sun, “An enhanced ISI shaping technique for multi-bit delta sigma DACs,” IEEE International Symposium on Circuits and Systems (ISCAS), pp. 2341-2344, 2014.
  37. Yeonam Yoon, Kyoungtae Lee, and Nan Sun, “A purely-VCO-based single-loop high-order continuous-time delta sigma ADC,” IEEE International Symposium on Circuits and Systems (ISCAS), pp. 926-929, 2014.
  38. Manzur Rahman, Long Chen, and Nan Sun, “Algorithm and implementation of digital calibration of fast converging radix-3 SAR ADC,” IEEE International Symposium on Circuits and Systems (ISCAS), pp. 1336-1339, 2014.
  39. Kyoungtae Lee, Yeonam Yoon, and Nan Sun, “A 1.8mW 2MHz-BW 66.5dB-SNDR delta-sigma ADC using VCO-based integrators with intrinsic CLA,” IEEE Custom Integrated Circuits Conference (CICC), pp. 1-4, 2013.
  40. Long Chen, Manzur Rahman, Sha Liu, and Nan Sun, “A fast radix-3 SAR analog-to-digital converter,” IEEE International Midwest Symposium on Circuits and Systems (MWSCAS), pp. 1148-1151, 2013.
  41. Arindam Sanyal and Nan Sun, “A very high energy-efficiency switching technique for SAR ADCs,” IEEE International Midwest Symposium on Circuits and Systems (MWSCAS), pp. 229-232, 2013.
  42. Rohit Yadav and Nan Sun, “A 1.2mW 67.5 dB SQDR VCO-based sigma delta ADC with non-linearity cancellation technique,” IEEE International Midwest Symposium on Circuits and Systems (MWSCAS), pp. 570-573, 2013.
  43. Kyoungtae Lee, Yeonam Yoon, and Nan Sun, “A 10MHz-BW, 5.6mW, 70dB SNDR  delta-sigma ADC using VCO-based integrators with intrinsic DEM,” IEEE International Symposium on Circuits and Systems (ISCAS), pp. 2006 – 2009, 2013.
  44. Wenjuan Guo, Youngchun Kim, Arindam Sanyal, Ahmed Tewfik, and Nan Sun, “A single SAR ADC converting multi-channel sparse signals,” IEEE International Symposium on Circuits and Systems (ISCAS), pp. 2235 – 2238, 2013.
  45. Travis Forbes, Wei-Gi Ho, Nan Sun, and Ranjit Gharpurey, “A frequency-folded ADC architecture with digital LO synthesis,” IEEE International Symposium on Circuits and Systems (ISCAS), pp. 149-152, 2013.
  46. Nan Sun, Yong Liu, Ling Qin, Guangyu Xu, and Donhee Ham, “Solid-state and biological systems interface,” Proceedings of European Solid-State Circuit Conference (ESSCIRC), Sep. 2012, pp. 14-17.
  47. Nan Sun, Hae-Seung Lee, and Donhee Ham, “A 2.9-mW 11-B 20-MS/s pipelined ADC with dual-mode-based digital background calibration,” Proceedings of European Solid-State Circuit Conference (ESSCIRC), Sep. 2012, pp. 269-272.
  48. Arindam Sanyal and Nan Sun, “A simple and efficient method for vector quantizer based mismatch-shaped ΔΣ DACs,” IEEE Proceedings of International Symposium on Circuits and Systems, pp. 528 – 531, 2011.
  49. Nan Sun, Yong Liu, Hakho Lee, Ralph Weissleder, and Donhee Ham, “Silicon RF NMR biomolecular sensor – Review,” (invited paper) IEEE Proceedings of International Symposium on VLSI Design, Automation & Test (VLSI-DAT), pp. 121-124, Apr. 2010.
  50. Nan Sun, Tae-Jong Yoon, Hakho Lee, William Andress, Vasiliki Demas, Pablo Prado, Ralph Weissleder, and Donhee Ham, “Palm NMR and one-chip NMR,” IEEE International Solid-State Circuits Conference Digest of Technical Papers (ISSCC), pp. 488-489, Feb. 2010.
  51. Yong Liu1, Nan Sun1,2, Hakho Lee, Ralph Weissleder, and Donhee Ham, “CMOS mini nuclear magnetic resonance system and its application for biomolecular sensing,” IEEE International Solid-State Circuits Conference Digest of Technical Papers (ISSCC), pp. 140-141, Feb. 2008. (1: Equal contribution; 2: Presenter at ISSCC)

Miscellaneous:

  1. Nan Sun and Donhee Ham, “Digital acceleration of correlation-based digital background calibration in pipelined ADCs,” Technical Report, Harvard University, August 2008.

Book Chapters:

  1. Arindam Sanyal and Nan Sun, “Hybrid VCO Based 0-1 MASH and Hybrid ΔΣ SAR,” invited book chapter in Hybrid ADCs, Smart Sensors for the IoT, and Sub-1V & Advanced Node Analog Circuit Design, Springer, 2017.
  2. Nan Sun and Donhee Ham, “Chapter 6: Hardware Developments, Handheld NMR systems for biomolecular sensing,” invited book chapter inMobile NMR and MRI, Royal Society of Chemistry (Edited by Michael Johns), pp. 158-182, 2015.
  3. Nan Sun and Donhee Ham, “Handheld NMR systems and their applications for biomolecular sensing,” invited book chapter inPoint of Care Diagnostics on a Chip, Springer (Edited by Robert Westervelt and David Issadore), pp. 177-196, 2012.
  4. Ozgur Yildirim, Nan Sun, and Xiaofeng Li, “Chaotic soliton oscillator and communications,” invited book chapter in Electrical Solitons: Theory, Design, and Applications, CRC press, pp. 197-208, 2012.
  5. Nan Sun, Yong Liu, and Donhee Ham, “Low cost diagnostics − RF designer’s approach,” invited book chapter inCMOS Biosystems: Where Electronics Meets Biology, Wiley (Edited by Kris Iniewski), pp. 1629-1643, 2011.

Patents:

  1. Nan Sun, “Fractional-N phase lock loop apparatus and method using multi-element fractional dividers,” filed for US patent protection on 3/15/2016.
  2. Wenjuan Guo and Nan Sun, “Fully-passive reconfigurable noise-shaping SAR ADCs,” filed for US patent protection on 10/1/15.
  3. Long Chen, Xiyuan Tang, and Nan Sun, “Statistical estimation based noise reduction technique for low power successive approximation register analog-to-digital converter,” filed for US patent protection on 9/1/2015.
  4. Nan Sun, “Dual-mode-based digital background calibration for gain variations and device mismatches,” filed for US patent protection on 12/29/09.
  5. Nan Sun and Donhee Ham, “Systems and methods for design and construction of NMR transceiver circuits,” filed for US and international patent protection on 02/25/09.
  6. Nan Sun et al, “Miniaturized magnetic resonance systems and methods,” filed for US and international patent protection on 10/06/08.

Invited Talks:

  1. Nan Sun,  “Advanced ADC design techniques,” Tsinghua University, China, 11/2017.
  2. Nan Sun,  “Advanced analog IC design techniques,” Analog Devices, MA, 10/2017.
  3. Nan Sun,  “Advanced ADC design techniques,” Cirrus Logic, TX, 8/2017.
  4. Nan Sun, “New ingredients in the pot – rethink analog IC design,” Yonsei University, Korea, 7/2017.
  5. Nan Sun, “New ingredients in the pot – rethink analog IC design,” NPU, China, 7/2017.
  6. Nan Sun, “New ingredients in the pot – rethink analog IC design,” Xidian University, China, 7/2017.
  7. Nan Sun, “Advanced analog circuit design techniques,” Tsinghua University, China, 7/2017.
  8. Nan Sun, “New ingredients in the pot – rethink analog IC design,” UESTC, China, 7/2017.
  9. Nan Sun, “New ingredients in the pot – rethink analog IC design,” U. Macau, Macau, 6/2017.
  10. Nan Sun, “New ingredients in the pot – rethink analog IC design,” HKUST, Hong Kong, 6/2017.
  11. Nan Sun, “New ingredients in the pot – rethink analog IC design,” Texas Instruments, TX, 5/2017.
  12. Nan Sun, “Emerging ADC architectures,” IEEE CICC ADC Forum, Austin, TX, 5/2017.
  13. Nan Sun, “New ingredients in the pot – rethink analog IC design,” Gatech, GA, 3/2017.
  14. Nan Sun, “New ingredients in the pot – rethink analog IC design,” UCSD, CA, 1/2017.
  15. Nan Sun, “New ingredients in the pot – rethink analog IC design,” Texas A&M University, TX, 11/2016.
  16. Nan Sun, “New ingredients in the pot – rethink analog IC design,” Tsinghua University, China, 11/2016.
  17. Nan Sun, “New ingredients in the pot – rethink analog IC design,” University of Michigan, MI, 10/2016.
  18. Nan Sun, “New ingredients in the pot – rethink analog IC design,” Cirrus Logic, TX, 6/2016.
  19. Nan Sun, “New ingredients in the pot – rethink analog IC design,” Stanford University, CA, 5/2016.
  20. Nan Sun, “New ingredients in the pot – rethink analog IC design,” Intel Labs, OR, 5/2016.
  21. Nan Sun, “New ingredients in the pot – rethink analog IC design,” Oregon State University, Corvallis, OR, 5/2016.
  22. Nan Sun, “New ingredients in the pot – rethink analog IC design,” University of Southern California, Los Angeles, CA, 4/2016.
  23. Nan Sun, “New ingredients in the pot – rethink analog IC design,” University of California at Los Angeles, Los Angeles, CA, 4/2016.
  24. Nan Sun, “New ingredients in the pot – rethink analog IC design,” Broadcom Ltd, Irvine, CA, 4/2016.
  25. Nan Sun, “Low power analog and mixed-signal IC design for bio-signal detection,” BioWireless, Austin, TX, 1/2016.
  26. Nan Sun, “Advanced analog IC design techniques,” Tsinghua University, Beijing, China, 11/2015.
  27. Nan Sun, “Advanced dynamic element matching techniques for both static and dynamic errors in CT DS modulator,” Cirrus Logic, TX, 6/2015.
  28. Nan Sun, “Handheld CMOS NMR biosensor,” Case Western Reserve University, Cleveland, OH, 4/2015.
  29. Nan Sun, “Scaling-friendly VCO-based DS ADC design in advanced CMOS processes,” Texas A&M University, College Station, TX, 4/2015.
  30. Nan Sun, “Low power SAR ADC and high-speed background timing skew calibration,” Silicon Labs, Austin, TX, 10/2014.
  31. Nan Sun, “High performance SAR ADC design,” Beijing Microelectronic Technology Institute, 8/2014.
  32. Nan Sun, “Low-power SAR ADC design,” Cirrus Logic, Austin, TX, 6/2014.
  33. Nan Sun, “Advanced analog IC research,” TSMC, Austin, TX, 5/2014.
  34. Nan Sun, “Handheld CMOS NMR biosensor,” Texas Tech University, Lubbock, TX, 11/2013.
  35. Nan Sun, “Scaling-friendly VCO-based DS ADC design in advanced CMOS processes,” Cirrus Logic, Austin, TX, 11/2013.
  36. Nan Sun, “Scaling-friendly VCO-based DS ADC design in advanced CMOS processes,” Freescale, AZ, 9/2013.
  37. Nan Sun, “Handheld CMOS NMR biosensor,” Texas Instruments at Santa Clara, CA, 7/2013.
  38. Nan Sun, “Handheld CMOS NMR biosensor,” Kilby Lab, Texas Instruments, TX, 7/2013.
  39. Nan Sun, “Handheld CMOS NMR biosensor,” Texas Instruments, TX, 1/2013.
  40. Nan Sun, “Mismatch shaping techniques for multibit DS ADCs,” Cirrus Logic, Austin, TX, 1/2013.
  41. Nan Sun, “Handheld CMOS NMR biosensor,” Samsung Research, Dallas, TX, 12/2012.
  42. Nan Sun, “Advanced dynamic element matching techniques,” Synaptics, Austin, TX, 12/2012.
  43. Nan Sun, “Advanced dynamic element matching techniques,” Texas Instruments, TX, 11/2012.
  44. Nan Sun, “Handheld CMOS NMR biosensor,” IEEE Instrumentation and Measurement Chapter, Austin, TX, 05/21/2012.
  45. Nan Sun, “Handheld CMOS NMR biosensor,” Qualcomm, San Diego, CA, 04/13/2012.
  46. Nan Sun, “Handheld CMOS NMR biosensor,” Intel, Portland, OR, 02/17/2012.
  47. Nan Sun, “Handheld CMOS NMR biosensor,” Peking University, Beijing, China, 01/05/2012.
  48. Nan Sun, “Handheld CMOS NMR biosensor,” RWTH Aachen University, Aachen, Germany, 12/13/2011.
  49. Nan Sun, “Handheld CMOS NMR biosensor,” University of Texas at Dallas, Dallas, TX, 11/11/2011.
  50. Nan Sun, “Handheld CMOS NMR biosensor,” IEEE SSCS/CAS Austin Chapter, Austin, TX, 11/02/2011.
  51. Nan Sun, “Handheld CMOS NMR biosensor,” Silicon Labs, Austin, TX, 09/16/2011.
  52. Nan Sun, “Handheld CMOS NMR biosensor,” ICMRM 11, Beijing, China, 08/16/2011.
  53. Nan Sun, “Handheld CMOS NMR systems,” Halliburton, Houston, TX, 06/24/2011.
  54. Nan Sun, “Advanced dynamic element matching techniques,” Tsinghua University, Beijing, China, 01/04/2011.
  55. Nan Sun, “Handheld CMOS NMR biosensor,” IBM T. J. Watson Research Center, Yorktown Heights, NY, 12/10/2010.
  56. Nan Sun, “Handheld CMOS NMR biosensor,” Bruker Biospin Inc., Billerica, MA, 11/16/2010.
  57. Nan Sun, “CMOS RF NMR biosensor & dual-mode pipelined ADC,” Institute of Microelectronics, Chinese Academy of Sciences, Beijing, China, 07/09/2010.
  58. Nan Sun, “CMOS RF NMR biosensor & dual-mode pipelined ADC,” Tsinghua University, Beijing, China, 07/05/2010.
  59. Nan Sun, “CMOS RF NMR biosensor & dual-mode pipelined ADC,” Institute of Electronics, Chinese Academy of Sciences, Beijing, China, 07/01/2010.
  60. Nan Sun, “CMOS RF NMR biosensor & dual-mode pipelined ADC,” Fudan University, Shanghai, China, 06/17/2010.
  61. Nan Sun, “CMOS RF NMR biosensor & dual-mode pipelined ADC,” Shanghai Jiaotong University, Shanghai, China, 06/17/2010.
  62. Nan Sun, “CMOS RF NMR biosensor & dual-mode pipelined ADC,” Rice University, Houston, TX, 04/14/2010.
  63. Nan Sun, “CMOS RF NMR biosensor & dual-mode pipelined ADC,” Stanford University, Stanford, CA, 04/08/2010.
  64. Nan Sun, “Handheld CMOS NMR biosensor,” University of Texas at Austin, Austin, TX, 03/25/2010.
  65. Nan Sun, “Handheld CMOS NMR biosensor,” Harvard University, Cambridge, MA, 03/22/2010.
  66. Nan Sun, “Handheld CMOS NMR biosensor,” Schlumberger-Doll Research Center, Cambridge, MA, 03/10/2010.
  67. Nan Sun, “Handheld CMOS NMR biosensor,” Stanford University, Stanford, CA, 02/04/2010.
  68. Nan Sun, “CMOS NMR biosensor,” Harvard University, 02/02/2010.
  69. Nan Sun, “CMOS NMR biosensor,” CMOS Emerging Technology Conference, Calgary, Canada, 02/2009.

Professional Experience:

Prof. Nan Sun is Associate Editor for:

  1. IEEE Transactions on Circuits and Systems – I, Regular Papers, since 2016
  2. Chinese Journal of Semiconductor, since 2016

He is Technical Program Committee Member in:

  1. IEEE Custom Integrated Circuits Conference (CICC), since 2016
  2. IEEE Asian Solid-State Circuits Conference (ASSCC), since 2011

He serves as Vice Chair for:

  1. IEEE Solid-State Circuits Society Central Texas Chapter, since 2011
  2. IEEE Circuits and Systems Society Central Texas Chapter, since 2011