Research Areas
Analog Circuit Design
Our current research in this
area is on circuit design techniques for short-channel CMOS
technologies. Low voltage and low power-dissipation are often key
considerations. Area-efficiency is also a very significant issue in
these processes, since it relates to cost of implementation. We are
exploring the design of front-end circuits such as low-noise
amplifiers and oscillators that seek to minimize die-area while
meeting the required performance metrics. The design of high-speed and
high-frequency circuits, where classical analog feedback cannot be
relied upon for minimizing process sensitivity is also being studied.
RFICs and Wireless Systems
This work explores efficient
transceiver and synthesizer designs for ISM-band and other
narrow-band wireless applications, and for emerging systems such as
Ultra Wideband. We are also investigating techniques for
efficient
signaling and interference mitigation in these applications.
Device technology has a
significant influence on the definition of wireless systems. This can
be clearly observed in the case of emerging broadband wireless systems
such as Ultra Wideband. As part of this research, we are studying the
interplay between devices, circuits and systems and the problem of
optimizing wireless systems for specific device technologies.
Parasitic Noise and Coupling
Mechanisms in ICs
Silicon substrates present a
finite distributed impedance to the devices that are fabricated on the
surface. This allows devices to communicate through a parasitic
coupling path. IC package and board impedance can provide other
parasitic coupling paths. Noise coupling and substrate losses can be
deleterious and in fact can set the bounds on achievable performance in
high-dynamic range systems such as transceivers for cellular
telephones. We are studying by means of modeling and measurement the
degradation in circuit performance due to these parasitic noise
mechanisms and coupling paths. This research also includes techniques
for mitigation of these effects. As a part of this effort we are
investigating functional macromodeling of mixed-signal cores for rapid
and accurate estimation of coupled noise.
Ranjit Gharpurey
Publications
Presentations
Patents
Department of Electrical and Computer Engineering
University of Texas at Austin
Publications
Presentations
Patents