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9

Working with Dynamic Multirate

Introduction

In systems such as phase-locked loops and telecommunications receivers, you might want to use a dynamic dataflow simulation model. A dynamic dataflow system can handle varying rates of data transmission by using one or more dynamic multirate blocks.

Block Types

In order to better understand dynamic multirate blocks, you should compare them with single-rate and static multirate blocks. Figure 9-1 shows some examples of all three types of blocks.

Figure 9-1  Block Examples

Single-Rate Blocks

A single-rate block accepts and produces data samples one at a time. In each simulation iteration, one data sample is accepted at the input, and one data sample is produced at the output. The Z delay block stores multiple data samples, but accepts exactly one data sample for every data sample produced at the output. Blocks connected to the input and output sides of a single-rate block operate at the same rate.

Static Multirate Blocks

A static multirate block accepts and produces data samples at different rates at the input and output using a fixed ratio between the two operating rates. For the two static multirate blocks shown in Figure 9-1, the ratio has been set to four, so each block accumulates four samples at the input for every one sample produced at the output. Blocks "downstream" from the multirate block output operate at one-fourth the rate of the blocks "upstream" from the multirate block at the input. The simulator implements this behavior as a nested loop.

Dynamic Multirate Blocks

A dynamic multirate block accepts and produces data samples at varying rates that depend on the data being processed. The simulator implements this behavior by dynamically scheduling the block code.

For example, in the dynamic multirate Downsample block, an input "N" dynamically specifies the ratio between the input and output rates. When the input "N" is 4, the block accumulates four samples at the input for every one sample produced at the output. If the input "N" changes to 5, the block accumulates five samples for every sample produced at the output. Blocks "downstream" from the multirate block output can operate at varying rates with respect to the blocks "upstream" from the multirate block at the input.

Dynamic Upsampling

The dynamic multirate Upsample block generally produces more data samples at its output than it receives at its input. The upsampling factor is determined by a block input "N." A block parameter determines whether the block repeats the input samples, inserts zero-valued samples, or performs linear interpolation between input samples.

Build the System

  1. In a new BDE window, build the system shown in Figure 9-2. Use the following blocks:

    2. >Logical>Clock/Counters>Counter Up-Down

    >Math>Basic>Constant

    >Dynamic Multirate>Resample>Upsample Real

    >Signal Gen/Store>Signal Sink>Data

Figure 9-2  Dynamic Upsampling Test System

Edit the Parameters

  1. Verify that the Cycle parameter of the Counter block is set to 5.
  2. Verify that the Value parameter of the Constant block is set to 1.0.
  3. Double-click on the middle Upsample block and set the Mode parameter to 'repeat'.
  4. Double-click on the bottom Upsample block and set the Mode parameter to 'linear'.
  5. Set the Library/File name parameters of the Sink blocks as follows (top to bottom):
    • first Sink block: 'yoursigs/count'
    • second Sink block: 'yoursigs/d_zero1'
    • third Sink block: 'yoursigs/d_repeat1'
    • fourth Sink block: 'yoursigs/d_linear1'
  6. Double-click on each Sink block and set the GET_SIM Signal Display Order parameters to the values shown in the figure.
  7. Select the output of the Counter block by selecting the junction dot (looks like a diamond) between the Counter and Upsample blocks.
  8. Execute the Design-Multirate Edit command.
  9. In the dialog box, verify that the Base Rate at that point is set to 1.0 and then click on the OK button.
  10. Use the File-Save As command to save the system under the logical file name yourlib/dmr1.system. Substitute your own library name for yourlib.

Simulate the System

  1. Execute the following command:
    2. Tools-Simulation Manager
  2. In the Simulation Manager window, set the Number of Samples field to 100.
  3. In the Simulation Manager window, execute the following command:
    4. File-Save As
  4. In the File Save As dialog box, verify that the toolrun name is yourlib/dmr1.toolrun, and then click on the OK button.
  5. Click on the Start button.
  6. When the simulation is done, click on the SigCalc button.
  7. In the simulation Files Preview dialog box, click on the OK button.
  8. Close the Simulation Manager window using the File-Exit command.
  9. With SigCalc in Point Align mode, examine the first 100 data points as shown in Figure 9-3.

Note: In the figure, the "point style" was set to "Single Point" using the Customize-Signal Properties command.

Figure 9-3  Dynamic Upsampling Results

Interpreting the Results

The Counter block counts from 1 to 4, wraps back to 0, and repeats indefinitely: 1, 2, 3, 4, 0, 1, 2, 3, 4, 0 . . . .

The first two dynamic multirate Upsample blocks operate like the static multirate Upsample and Repeat blocks, except that the upsampling factor is controlled by a block input. Thus, the upsampling factor changes during the simulation. Although the inputs of these blocks operate at a periodic rate in this design, the outputs do not.

The first Upsample block has its Mode parameter set to 'zero'. When the input to the block is 1, the block produces one data sample, which is recorded by the Sink block. When the input to block is 2, the block produces two data samples, which are both recorded by the Sink block, and so on. The block inserts zeros between the input samples to produce the output. Thus, the Sink block records the following sequence: 1, 2, 0, 3, 0, 0, 4, 0, 0, 0, 1, 2, 0 . . . .

When the input to the block is 0, the block does not produce anything at the output. The Sink block connected to this output only operates when it receives a data sample, so it is held inactive at that time.

The second Upsample block has its Mode parameter set to 'repeat', so the block repeats the input samples. The Sink block connected to the output records the following sequence: 1, 2, 2, 3, 3, 3, 4, 4, 4, 4, 1, 2, 2 . . . .

The third Upsample block has its Mode parameter set to 'linear'. The block performs linear interpolation to determine the values to insert. The Sink block records the following sequence: 1, 1.5, 2, 2.33, 2.66, 3, 3.25, 3.5, 3.75, 4 . . . .

No Rate or Time Information

In a dynamic multirate system, each block can operate at a periodic rate, at irregular times, or not at all, depending on the data processed by the dynamic multirate blocks. Therefore, the simulator does not keep track of operating rates or the times at which events occur.

Each Sink block assigns an arbitrary sampling frequency value to the recorded signal. This value should be ignored because the true operating rate is irregular.

Base Rate Setting

You can optionally set a Base Rate in a dynamic multirate system. The Base Rate assignment is useful for specifying a point of reference for the number of simulation iterations to run. However, the simulator cannot keep track of operating rates in the system because blocks in general do not operate at periodic rates.

In this simulation, you set the Base Rate at the output of the Counter block. In the simulator control window, you entered 100 in the Samples field, so the simulation ran until the Counter block produced 100 samples at that output.

Each Upsample block produced 10 samples for every 5 samples produced by the Counter block, giving a total of 200 samples. If you had set the Base Rate at the output of an Upsample block instead of the Counter block, the simulation would have run only half as long.

If Out Block

The If Out block passes data samples from its input to one of two outputs, depending on the state of a control signal. Blocks connected to the inactive output are held inactive.

Build the System

  1. In a new BDE window, build the system shown in Figure 9-4. Use the following blocks:

    2. >Signal Gen/Store>Miscellaneous>Progr Func Gen

    >Dynamic Multirate>Control>If Out Real

    >Signal Gen/Store>Signal Sink>Data

Figure 9-4  If Block Test System

  1. Double-click on the Programmable Function Generator block and set the Quiescent Frequency parameter to 0.01. Leave the other parameters at their default settings.
  2. Set the Library/File name parameters of the Sink blocks as follows:
    • top Sink block: 'yoursigs/sine1'
    • middle Sink block: 'yoursigs/then1'
    • bottom Sink block: 'yoursigs/else1'
  3. Double-click on each Sink block and set the GET_SIM Signal Display Order parameters to the values shown in the figure.
  4. Select the output of the Programmable Function Generator block by selecting the junction dot (looks like a diamond) between the Programmable Function Generator and If Out blocks.
  5. Execute the Design-Multirate Edit command.
  6. In the dialog box, verify that the Base Rate at that point is set to 1.0 and click on the OK button.
  7. Use the File-Save As command to save the system under the logical file name yourlib/dmr2.system. Substitute your own library name for yourlib.

Simulate the System

  1. Execute the following command:
    2. Tools-Simulation Manager
  2. In the Simulation Manager window, set the Number of Samples field to 1000.
  3. In the Simulation Manager window, execute the following command:
    4. File-Save As
  4. In the File Save As dialog box, verify that the toolrun name is yourlib/dmr2.toolrun, and then click on the OK button.
  5. Click on the Start button.
  6. When the simulation is done, click on the SigCalc button.
  7. In the simulation Files Preview dialog box, click on the OK button.
  8. Close the Simulation Manager window using the File-Exit command.
  9. With SigCalc in Point Align mode, examine the full range of simulation results, as shown in 9-5.

Note: In the figure, the "point style" was set to "Interpolated" using the Customize-Signal Properties command.

Figure 9-5  If Block Simulation Results

Interpreting the Results

The Programmable Function Generator block generates a sine wave with a sampling frequency of 1.0 and a periodic frequency of 0.01. There are 100 data samples per sine wave cycle.

The If Out block is a dynamic multirate block. When the "cond" input is true (>0.0), data samples are passed through from the "in" input to the "then" output, and blocks connected to the "else" output are held inactive. When the "cond" input is false (0.0), data samples are passed through from the input to the "else" output, and blocks connected to the "then" output are held inactive.

When the sine wave is positive, the "If" condition is true. The "then" Sink block records the positive portion of the sine wave, and the "else" Sink block is held inactive (does not record anything). When the sine wave is zero or negative, the opposite happens: the "then" output is inactive, the "else" output is active, and the "else" Sink block records the negative portion of the sine wave.

The 1000 data samples received at the "in" input are distributed between the "then" and "else" Sink blocks: 499 to the "then" Sink block and 501 to the "else" Sink block. Only one of these two Sink blocks is active at any given time.

In addition to the "If" type block, several other Dynamic Multirate blocks are available for controlling block execution, including "Case," "For," and "While" type blocks.

Time-Stamped Signals

A signal containing data samples captured at irregular times (not at a fixed periodic rate) is called an asynchronous signal. If you want to capture and display an asynchronous signal on a time scale, you need to generate a "time stamp" signal to indicate the times at which the data samples were captured.

Build the System

  1. Go back to the previous system model, yourlib/dmr2.system and remove the lower two Sink blocks.
  2. Add the following blocks:

    3. >Signal Gen/Store>Miscellaneous>Impulse

    >Logical>Clock/Counters>Counter Simple

    >Dynamic Multirate>Control>If Out Real

    >Signal Gen/Store>Signal Sink>Asynchronous Real

  3. Using the Add-Wire command, connect the blocks as shown in Figure 9-6.
Figure 9-6  Time Stamp Test System

  1. Set the Library/File name parameters of the new Asynchronous Sink blocks as follows:
    • top Asynchronous Sink block: 'yoursigs/a_then1'
    • bottom Asynchronous Sink block: 'yoursigs/a_else1'
  2. Double-click on each Asynchronous Sink block and set the GET_SIM Signal Display Order parameters as indicated in the figure.
  3. Use the File-Save As command to save the system under the logical file name yourlib/dmr3.system. Substitute your own library name for yourlib.

Simulate the System

  1. Execute the following command:
    2. Tools-Simulation Manager
  2. In the Simulation Manager window, set the Number of Samples field to 1000.
  3. In the Simulation Manager window, execute the following command:
    4. File-Save As
  4. In the File Save As dialog box, verify that the toolrun name is yourlib/dmr3.toolrun, and then click on the OK button.
  5. Click on the Start button.
  6. When the simulation is done, click on the SigCalc button.
  7. In the simulation Files Preview dialog box, click on the OK button.
  8. Close the Simulation Manager window using the File-Exit command.
  9. Examine the full range of simulation results in both the Point Align and Time Align modes. The Time Align mode is shown in Figure 9-7.

Note: In the figure, the "point style" was set to "Single Point" using the Customize-Signal Properties command.

Figure 9-7  Time Stamp Simulation Results

Time Stamp Blocks

The Simple Counter block generates an incrementing sequence that continues indefinitely: 0, 1, 2, 3, 4, 5, . . . . (An Impulse block connected to the reset input of the Simple Counter causes the counter to start from zero.) The counter operates at the same rate as the Programmable Function Generator because of the way data flows from block to block in this design. The count value can be considered a time value for the simulation run.

The "then" outputs of both If Out blocks are activated together whenever the sine wave is positive. When this happens, the "then" output of the top block has the sine wave data, and the "then" output of the bottom block has the current time value. Similarly, the "else" outputs produce data values and time values in parallel whenever the sine wave is zero or negative.

Each Asynchronous Sink block records both the signal data and time stamp values and combines them to create a time-stamped asynchronous signal. This type of signal has a time value associated with each signal data point.

Display of Time-Stamped Signals

In the Point Align mode, SigCalc displays signal data points sequentially without considering the sampling frequency or time information in the signal files.

In the Time Align mode, SigCalc displays signals on a common time base. The spacing between points depends on the sampling frequency and sampling times. For the time-stamped asynchronous signals, S2 and S3, data points are displayed at irregular intervals. The gaps in the signals represent the times that the Asynchronous Sink blocks were inactive.

Run-Length Encoder Example

The Run-Length Encoder is a prebuilt system model that demonstrates how you can use dynamic multirate blocks.

Display the Run-Length Encoder

  1. Open a new BDE design window.
  2. Execute the following command: 
    3. File-Open
  3. With the Logical grouping option toggled on, select the following design name:

    4. >Dynamic Multirate>Run Length Encoder (Unclustered)

  4. Click on the OK button.

    5. BDE displays the system design shown in 9-8. You will attach probes to the points indicated in the figure.

Figure 9-8  Run-Length Encoder (Unclustered)

Set Up the Simulation

  1. Execute the following command: 
    2. Tools-Simulation Manager
  2. Click on the Probes tab.
  3. Select the top output pin of the If block.
  4. In the Probes page, click on the Attach button.
  5. Select the output pin of the Up Sample N block.
  6. In the Probes page, click on the Attach button again.
  7. Click on the Simulation tab.
  8. Toggle off the Debug option.
  9. In the Number of Samples field, enter the following string:

    10. RUN_TO_EOF

  10. In the Simulation Manager, execute the following command: 
    11. File-Save As
  11. In the File Save As dialog box, enter the following name:

    12. yourlib/unclust_rle.toolrun

  12. Click on the OK button.

Run the Simulation

  1. Click on the Start button.

    2. After the simulation starts, two X windows appear on the screen. As the simulation progresses, the two images are built up line by line.

  2. Allow the simulation to run to completion. This can take several minutes. While you are waiting, you can read the following explanation of how the system operates.

How the System Operates

This system is a run-length encoder, which encodes each consecutive run of identical data values using two numbers: the number of samples and the value. This is the simplest of several encoding algorithms that are sometimes used to compress image data.

For example, suppose that you have a data stream that looks like this: 

35 35 35 42 17 17 17 17 55 33 33

A run-length encoder encodes this data as three 35s, one 42, four 17s, etc. The resulting compressed data stream looks like this: 

    3 35 1 42 4 17 1 55 2 33

The longer the runs of consecutive data samples, the better the compression ratio. In the worst case of a data stream that has no consecutive runs at all, the encoded data stream is twice as long as the original data stream.

Image Data

In this system model, the data file being encoded contains a monochrome graphic image consisting of a 445 by 448 array of pixels. There are 16 possible brightness values between 0.0 and 1.0 for each pixel. The pixel values are stored in the signal file 'spb_demo/craft', starting with the value for the upper left pixel, continuing from left to right, then top bottom, and ending with the lower right pixel.

Run-Length Encoder Blocks

The subsystem enclosed in a box and labeled "Encoder" performs run-length encoding. The Merge and Repeat blocks are static multirate blocks, both with an output/input operating rate ratio of 2 to 1. The If Out block is a dynamic multirate block. All of the other blocks in the subsystem are single-rate blocks.

The Equal Real block compares the previous data sample (held by the Unit Delay block) with the current one. As long as the previous data sample is the same as the current one, the output of the Equal Real block is true (1.0), the output of the Repeat block is false (0.0), and the "then" output of the If Out block is inactive. This means that the blocks "downstream" from the "then" output are also inactive. The Simple Counter operates at the same rate as the Signal Source block and therefore keeps a count of the number of consecutive identical data samples.

When a data sample appears that does not match the previous sample, the output of the Equal Real block is false. This resets the Simple Counter block back to zero. The consecutive-run count for the previous sample is still held by the second Unit Delay block. The Merge block merges the consecutive-run count and the value of the previous data into one signal: the count value followed by the data value.

At the same time, the Repeat block produces two true (1.0) data samples, activating the "then" output of the If Out block. This allows the count and data values to pass through from the "in" input to the "then" output and also causes blocks "downstream" from the "then" output to be executed two times. The "then" output of the If Out block is the run-length encoded signal.

Run-Length Decoder Blocks

The run-length decoder consists of the two blocks enclosed in a box and labeled "Decoder." The Split block is a static multirate block that splits the count and data into two separate signals. The Upsample block is a dynamic multirate block that repeats the input sample at input "x" n times, where n is the count value provided at the input "N." The block produces n tokens for each pair of tokens that arrive at the two inputs. This reconstructs the original signal.

Image Display Blocks

Each Image Display block displays an image in an X window during the simulation run. The first image display shows the compressed data, which is a garbled picture, while the second shows the reconstructed image, which should be identical to the original image. The relative size of the two images gives a graphical indication of the data compression ratio.

Examine the Simulation Results

  1. After the simulation runs to completion, remove the two images from the screen by clicking on their Quit buttons.
  2. In the Simulation Manager, click on the SigCalc button.
  3. In the simulation Files Preview dialog box, click on the OK button.
  4. Close the Simulation Manager window using the File-Exit command.
  5. In SigCalc, set the Win Size field to 1000.

    6. The results are shown in Figure 9-9.

Figure 9-9  Run-Length Encoder Simulation Results

The data from second probe is the decoded signal, the data from first probe is the compressed data signal, and the remaining signal is the original data.

By looking at the lengths of the signals (# Pts field), you can see that the compressed signal is about 40% as long as the original signal.

  1. The decoded signal and the original signal should be the same. Subtract one from the other and verify that the result is zero.
  2. Using the middle mouse button, click on any signal waveform.
  3. Move the signal cursor to the beginning of the signals and examine the values of the first few data points.

    4. In the encoded data signal, the first two data points are both zeros, which you can ignore. The next two data points have the values 0.9492 and 470, indicating a consecutive run of 470 data samples with a value of 0.9492, which you can verify by looking at the original signal.

Split the Compressed Data Signal

  1. Select the encoded signal (recorded by the first probe) and execute the following command: 
    2. Edit-Vector-Split
  2. In the dialog box, enable the Entered # of Components and From Interlaced buttons and set the Number of Components to 2.
  3. Click on the OK button.

    4. SigCalc splits the encoded signal into two component signals, as shown in Figure 9-10. One signal contains the data values with all redundant samples removed. The other contains the consecutive-run counts.

Figure 9-10  Splitting the Encoded Signal

Clustering

In a single-rate or static multirate system, blocks are scheduled statically. In other words, the simulator only has to determine the order of block execution once, at the beginning of the simulation.

A system that contains one or more dynamic multirate blocks is a dynamic dataflow system. Blocks are scheduled dynamically at run time rather than statically at program creation time. The additional task of scheduling the blocks at run time slows down performance considerably when compared to a similar single-rate or static multirate system.

To speed up performance of a dynamic multirate system, you can designate synchronous dataflow clusters. Each cluster is scheduled statically internally and then treated as a single block by the dynamic dataflow scheduler. This reduces the scheduling work load at run time.

To create a cluster, you need to encapsulate a subsystem into a hierarchical block, and then designate the block to be a cluster. A simulation of a clustered system typically runs significantly faster than an equivalent unclustered system.

Open the Clustered Design

  1. Open a new BDE design window.
  2. Execute the following command: 
    3. File-Open
  3. With the Logical grouping option toggled on, select the following design name:

    4. >Dynamic Multirate>Run Length Encoder (Clustered)

  4. Click on the OK button.

    5. BDE displays the system design shown in Figure 9-11.

Figure 9-11  Run-Length Encoder (Clustered)

The Static RLE block is a hierarchical block that has already been designated a cluster using the Design-Set Synchronous Block command. The block is displayed in a different color from ordinary blocks.

Examine the Clustered Design

  1. Double-click on the Static RLE block to display its context window.

    2. The Static RLE block represents the detail view shown in Figure 9-12. This subsystem contains only single-rate and static multirate blocks.

Figure 9-12  Clustered Subsystem

The design containing a clustered subsystem is functionally the same as the unclustered design.

  1. Close the context window.

Start a New Simulation

  1. In the design window containing the clustered system, execute the following command: 
    2. Tools-Simulation Manager
  2. Toggle off the Debug option.
  3. In the Number of Samples field, enter the following string:

    4. RUN_TO_EOF

  4. In the Simulation Manager, execute the following command: 
    5. File-Save As
  5. In the File Save As dialog box, enter the following name:

    6. yourlib/clust_rle.toolrun

  6. Click on the OK button.
  7. Click on the Start button.

    8. The output image is drawn faster than for the unclustered design.

  8. Click on the Stop button to stop the simulation.
  9. Close the BDE design windows and Simulation Manager windows.
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