Tung-Yeh Wu / 吳東燁
Last Update: Mar 27, 2008
Hi, welcome your visiting to my website. My name is Tung-Yeh Wu (吳東燁). In the University of Texas at Austin, I am a PhD student in Electrical and Computer Engineering (ECE) and also a member of Computer Engineering Research Center (CERC). This website could provide you not only with a few ideas about my research interest, my recent research works, and my previous research result, but also with some helpful information such as the tutorial of EDA tools and the links I often visit. Please feel free to contact me if you have any opinion or suggestion for my website.

About Me

Education

• Ph.D. program in Electrical and Computer Engineering, The University of Texas at Austin    Jan 2007~
• M.S. in Electrical and Computer Engineering, The University of Texas at Austin    Dec 2006
• B.S. in Electrical Engineering, National Chung-Cheng University    Jun 2002

Experience

• Teaching Assistance - Department of ECE in UT Austin            Jan 2006 ~ Dec 2007

• Internship - Media Tek Inc. Taiwan            May 2006~Aug 2006, May 2007~Aug2007

Research Interest

• Digital Circuit Design
• VLSI Testing
• Fault Tolerant Design
• IR Drop Analysis

Advisor

• Dr. Jacob A. Abraham

My Research

My TA Class

• EE382M - VLSI 1
• EE360R - Computer-Aided Circuit Design

EDA Tutorial Link

• Cadence_2004 Tutorial - I use this tutorial for lab in my TA class. It goes through from schematic to post layout simulation
• Hspice Tutorial - This is a tutorial for a hspice beginner
• PCB Design Tutorial - It's a very good reference if it's your first time designing a PCB.

Not Related to Research

Contact Me

• E-mail: tywu@mail.utexas.edu