Functional Verification of Processors

  • PowerPC behavioral simulator has about 40,000 lines of C++ code
  • IBM developed a model-based test generator, an expert system which contains a formal model of processor architecture, and a heuristic data base of testing knowledge
  • Goal is to improve the quality of tests
    • Verification of previous RS/6000 processor involved 15 billion simulation cycles (large team with hundreds of computers during a year)
  • Monitors can be compiled with the simulation model to make it easy to check whether a failure has occurred
  • Commercial tools and environments are available to facilitate simulation
  • Some efforts to automatically generate test cases