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Re: Exchange of mail on Test benches and benchmark requirements



I think that we have to be realistic about what formats and materials
we can obtain from willing suppliers. If we insist on too much,
then we will end up with no benchmarks.

Maybe we should look at two phases of getting varied formats.
In the first phase, circuits are donated. In the second phase
the work of removing existing DFT structures and of language
conversion is done.

There are several ways that may work for the conversions. Some
companies have tools that convert Verilog to VHDL or vice-versa:
maybe they will allow those tools to be used to perform the
conversion. (Hmmm, interesting experiment: take a circuit in Verilog,
run tools, convert to VHDL, convert that back to Verilog, run tools
again, see how different they could be.) Another method could
be to get universities to perform the conversion with grad students,
so as to produce a "natural" version on the second language.

-- 
Gordon D Robinson
Credence Systems Corporation
215 Fourier Ave
Fremont CA 94539

Tel: (510) 623-5139
Fax: (510) 623-2549
Email: Gordon_Robinson@credence.com
ITC: http://www.itctestweek.org/