| UT-CERC-06-01 |
Large Scale Placement with Explicit Cell Movement Control |
Tao Luo and David Z. Pan |
| UT-CERC-10-01 |
Perturbation-Based Computing for Next-Generation Embedded IT
Targeted at Emerging Nanoelectronics |
Andrey Zykov, Margarida Jacome, and Gustavo de Veciana |
| UT-CERC-10-02 |
Integration of Virtual Platform Models into a System-Level
Design Framework |
Pablo E. Salinas Bomfim and Andreas Gerstlauer |
| UT-CERC-10-03 |
Towards a High-Performance, Low-Power Linear Algebra
Processor |
Ardavan Pedram, Andreas Gerstlauer, and Robert van de
Geijn |
| UT-CERC-11-01 |
Algorithm/Architecture Co-Design of a Stochastic Simulation
System-on-Chip |
Hyungman Park, Xiaohu Shen, Haris Vikalo, and Andreas
Gerstlauer |
| UT-CERC-11-02 |
ExtractCFG: A Framework to Enable Accurate Timing Back
Annotation of C Language Source Code |
Arindam Goswami and Andreas Gerstlauer |
| UT-CERC-12-01 |
High-Speed Hybrid Ring Generator Design Providing
Maximum-Length Sequences with Low Hardware Cost |
Laung-Terng Wang, Nur A. Touba, Richard P. Brent, Hui Wang, and
Hui Xu |
| UT-CERC-12-03 |
On Designing Transformed Linear Feedback Shift Registers with
Minimum Hardware Cost |
Laung-Terng Wang, Nur A. Touba, Richard P. Brent, Hui Xu, and
Hui Wang |
| UT-CERC-12-04 |
FALCON: Rapid Statistical Fault Coverage Estimation for Complex
Designs |
Shahrzad Mirkhani and Jacob A. Abraham |
| UT-CERC-12-06 |
Design of Flexible Audio Processing Platforms using the
System-on-Chip Environment |
Wei-Cheng Su, Parisa Razaghi, Ashmita Sinha, and Andreas
Gerstlauer |
| UT-CERC-16-01 |
simCUDA: A C++ based CUDA Simulation Framework |
Abhishek Das and Andreas Gerstlauer |
