1. Create new library
2.
Schematic Composer
3. Netlist
generation using Verilog-XL
We can create a simple design using cell nand2x1 from the SimpleSCL library. First create a new schematic view called Design. Click Add -> Instance... get the cell nand2x1 in SimpleSCL library as shown in the following window:
Our simple design looks like this:
Click Design -> Check and Save