1. si.inp generation
2.
MoveSiInp.pl
a. TransientHspice.pl
b. CapaFinder.pl
3.
Transient Analysis
4. Entry-point Consideration
5.
HspiceAUTO.pl
a. Spectre2Hspice.pl
b. fallrisetable.pl
6.
librarylist.pl
7.
librarymaker.pl
8.
LibraryCompiler
In our tutorial, we will have a seven by seven delay look up table for each combination of input pin and output pin. We have four tables to specify the delay. These tables are cell_rise table, cell_fall table, rise_transition table, and fall_transition table. The two variables of these tables are output pin load capacitance and input transition time. For output pin load capacitance, seven entry points can be set as multiples of a typical input gate capacitance. And the relatively large number of points should be placed at moderate fan out load. In large load case, the delay behavior is close to a linear function and is easier to predict. The transition time should be chosen so that one can see the increasing or decreasing of delay and transition with respect to this variable.