1. Introduction
2. Setting up
the environment
3. Starting Cadence
4. Library Manager
5. Creating new library
6. Creating new cell
7. Schematic Composer
8. Creating Symbols
9. Logic Simulation with
Verilog-XL
10. Custom layout with
Virtuoso
11. Layout Extraction
12. Layout Vs. Schematic (LVS)
13. Abstract view
To create symbols, first we need to create the symbol view from our schematic. In the "Virtuosos Schematic Editing" window, click Design -> Create Cellview -> From Cellview...
You will see the following window pop up. Click OK to continue.
"Virtuoso Symbol Editor" will appear with a standard symbol in it. Since we will be making more than one cell, it is recommended to make a unique symbol for each cell.
Use the commands found under the Add -> Shape tab to create Line,
Rectangle, Polygon, Circle, Ellipse, and Arc.
The red box around the whole symbol is the Selection Box. When the symbol
is in use, the selection box highlights the boundary of the symbol.
If you made mistakes, you can highlight the error and use the "delete" key to
delete it, or you can use Edit -> Delete.
After the symbol is done, you may want to set the origin of the symbol by Edit -> Origin.
Setting the origin gives the user a better control of the symbol in use.
Lastly, you want to make sure that the variable [@partName] corresponds to the
cell name. You can open the "Edit Cellview Property" by clicking Edit ->
Properties -> Cellview and make sure your partName corresponds to your Cell.
After remodeling the symbol, your symbol might look like the following.
Now it is time to Design -> Check and Save and close the window. You will find that you just create a symbol view for your cell.
